clock period meaning in English

时钟脉冲周期
时钟周期

It will delay the start signal for six clock periods .
它将起始信号延迟六个小时周期。
In the paper , the new retiming which can be used well together with existing combinational optimization techniques is introduced . retiming can eliminate sequence conflict when sequence constraint condition for example destination clock period is scheduled , the retiming is called sequence adjust strategy
当给定设定的时序约束条件，如目标时钟周期时，利用重定时优化可以消除时序冲突，我们称此重定时优化方法为时序调整策略。
And some effective techniques are discussed to lower the clock period and cpi ( cycles per instruction ) of the pipeline . to eliminate the clock frequency limitation by some complex instructions " long executing time and achieve single - cycle throughput , a scalable super - pipelining extension technique together with a high performance / cost pipeline shift mechanism is presented in this paper
为避免流水时钟频率受制于某些复杂运算指令较长的运算时间，又要达到单周期完成一条运算指令的吞吐量指标，本文提出对ex级进行可伸缩超流水扩展的思想，提出并实现了一种高性加比的切换控制方案。